1 files changed, 79 insertions, 15 deletions

diff --git a/ops.yaml b/ops.yaml
index da79eef..4e32ce8 100644
--- a/ops.yaml
+++ b/ops.yaml
@@ -7557,7 +7557,7 @@ templates:
       STATE_INVALID,
       STATE_NOT_IMPLEMENTED,
       STATE_LAST,
-    } cpu_state_t;
+    } gb_cpu_state_t;
 
     // gb-manual, p23
     typedef enum {
@@ -7566,16 +7566,14 @@ templates:
       P1_MODE_P15,
     } p1_mode_t;
 
-    typedef enum {
-      GB_BTN_UP     = 1,
-      GB_BTN_DOWN   = (1 << 1),
-      GB_BTN_LEFT   = (1 << 2),
-      GB_BTN_RIGHT  = (1 << 3),
-      GB_BTN_A      = (1 << 4),
-      GB_BTN_B      = (1 << 5),
-      GB_BTN_SELECT = (1 << 6),
-      GB_BTN_START  = (1 << 7),
-    } gb_btn_t;
+    #define GB_BTN_UP     1
+    #define GB_BTN_DOWN   (1 << 1)
+    #define GB_BTN_LEFT   (1 << 2)
+    #define GB_BTN_RIGHT  (1 << 3)
+    #define GB_BTN_A      (1 << 4)
+    #define GB_BTN_B      (1 << 5)
+    #define GB_BTN_SELECT (1 << 6)
+    #define GB_BTN_START  (1 << 7)
 
     #define GPU_MODE_OAM 2
     #define GPU_MODE_VRAM 3
@@ -7594,7 +7592,7 @@ templates:
         uint8_t zram[0x7F]; // zram (128 bytes)
 
         // rom (at least 32k)
-        uint8_t *rom;
+        const uint8_t *rom;
         uint32_t rom_size;
 
         // enable interrupt flags (addr: 0xFFFF)
@@ -7609,8 +7607,8 @@ templates:
         uint8_t p1_mode;
         uint8_t btns;
 
-        // external ram (optional, 8k)
-        uint8_t *eram;
+        // external ram (optional, up to 64k)
+        uint8_t eram[65536];
       } mmu;
 
       struct {
@@ -7631,9 +7629,17 @@ templates:
       } gpu;
 
       struct {
+        uint32_t clock; // FIXME: uint16_t?
+        uint8_t div,
+                tima,
+                tma,
+                tac;
+      } timer;
+
+      struct {
         uint16_t rs[RW_LAST];
         uint32_t clock; /* FIXME: uint16_t? */
-        cpu_state_t state;
+        gb_cpu_state_t state;
 
         // interrupt master enable
         bool ime;
@@ -7641,6 +7647,14 @@ templates:
     } gb_t;
 
     #define PORT_P1   0xFF00
+
+    // timer registers
+    #define PORT_DIV  0xFF04
+    #define PORT_TIMA 0xFF05
+    #define PORT_TMA  0xFF06
+    #define PORT_TAC  0xFF07
+
+    // interrupt registers
     #define PORT_IE   0xFFFF
     #define PORT_IF   0xFF0F
 
@@ -7701,6 +7715,22 @@ templates:
         }
 
         break;
+      case PORT_DIV:
+        return ctx->timer.div;
+
+        break;
+      case PORT_TIMA:
+        return ctx->timer.tima;
+
+        break;
+      case PORT_TMA:
+        return ctx->timer.tma;
+
+        break;
+      case PORT_TAC:
+        return ctx->timer.tac & 0x7;
+
+        break;
       case PORT_LCDC:
         return ctx->gpu.lcdc;
 
@@ -7790,6 +7820,24 @@ templates:
         }
 
         break;
+      case PORT_DIV:
+        // reset to zero regardless of value
+        ctx->timer.div = 0;
+
+        break;
+      case PORT_TIMA:
+        // FIXME: is this right?
+        ctx->timer.tima = val;
+
+        break;
+      case PORT_TMA:
+        ctx->timer.tima = val;
+
+        break;
+      case PORT_TAC:
+        ctx->timer.tima = val & 0x7;
+
+        break;
       case PORT_LCDC:
         ctx->gpu.lcdc = val;
 
@@ -9114,10 +9162,24 @@ templates:
       }
     }
 
+    static void
+    timer_step(
+      gb_t * const ctx,
+      const uint16_t clock
+    ) {
+      // TODO:
+      UNUSED(ctx);
+      UNUSED(clock);
+      // ctx->timer.clock += clock;
+      // ctx->timer.div += (ctx->timer.clock
+      // const uint16_t new_div = ((uint16_t) ctx->timer.div) + (ctx->timer.clock / 32);
+    }
+
     void
     gb_step(
       gb_t * const ctx
     ) {
+      // TODO: handle halt
       // handle pending interrupts
       gb_handle_interrupts(ctx);
 
@@ -9144,6 +9206,8 @@ templates:
       // increment cpu clock
       ctx->cpu.clock += clock;
 
+      timer_step(ctx, clock);
+
       // advance gpu
       gpu_step(ctx, clock);
     }