From 064ab1a623e444bce788a3edb128443041e765aa Mon Sep 17 00:00:00 2001 From: Paul Duncan Date: Wed, 20 Jun 2018 13:55:39 -0400 Subject: clean up mbc1 --- ops.yaml | 58 +++++++++++++++++++++++++++++----------------------------- 1 file changed, 29 insertions(+), 29 deletions(-) (limited to 'ops.yaml') diff --git a/ops.yaml b/ops.yaml index d5a4e01..fb950c3 100644 --- a/ops.yaml +++ b/ops.yaml @@ -7815,35 +7815,6 @@ templates: } } - static uint16_t - mbc1_eram_get_addr( - const gb_t * const ctx, - const uint16_t addr - ) { - // switchable ram bank - // AAB BBBB BBBB BBBB - return ( - // A: ram_bank (2 bits, if rom_ram_mode == 1) - (((ctx->mmu.mbc1.rom_ram_mode ? ctx->mmu.mbc1.ram_bank : 0) & 0x3) << 13) | - - // B: address (13 bits) - (addr & 0x1FFF) - ); - } - - static uint8_t - mbc1_eram_rb( - const gb_t * const ctx, - const uint16_t addr - ) { - if (ctx->mmu.eram && ctx->mmu.mbc1.ram_enable) { - return ctx->mmu.eram[mbc1_eram_get_addr(ctx, addr)]; - } else { - // FIXME: what do we do with no eram? - return 0; - } - } - static void mbc1_rom_wb( gb_t * const ctx, @@ -7877,6 +7848,35 @@ templates: } } + static uint16_t + mbc1_eram_get_addr( + const gb_t * const ctx, + const uint16_t addr + ) { + // switchable ram bank + // AAB BBBB BBBB BBBB + return ( + // A: ram_bank (2 bits, if rom_ram_mode == 1) + (((ctx->mmu.mbc1.rom_ram_mode ? ctx->mmu.mbc1.ram_bank : 0) & 0x3) << 13) | + + // B: address (13 bits) + (addr & 0x1FFF) + ); + } + + static uint8_t + mbc1_eram_rb( + const gb_t * const ctx, + const uint16_t addr + ) { + if (ctx->mmu.eram && ctx->mmu.mbc1.ram_enable) { + return ctx->mmu.eram[mbc1_eram_get_addr(ctx, addr)]; + } else { + // FIXME: what do we do with no eram? + return 0; + } + } + static void mbc1_eram_wb( gb_t * const ctx, -- cgit v1.2.3