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authorPaul Duncan <pabs@pablotron.org>2018-06-23 12:18:51 -0400
committerPaul Duncan <pabs@pablotron.org>2018-06-23 12:18:51 -0400
commit0e0446f314a727e9a40d2835ee21e86629e12b98 (patch)
tree8111958b39b76f9eb08ad3aaab005254958a0edb
parentf3cafdfecc7a3b7b256c150b5c5452214a5af099 (diff)
downloadgb-c-0e0446f314a727e9a40d2835ee21e86629e12b98.tar.bz2
gb-c-0e0446f314a727e9a40d2835ee21e86629e12b98.zip
add missing prefix instructions
-rw-r--r--ops.yaml143
1 files changed, 143 insertions, 0 deletions
diff --git a/ops.yaml b/ops.yaml
index d2faa6d..425bb34 100644
--- a/ops.yaml
+++ b/ops.yaml
@@ -4259,6 +4259,8 @@ ops:
n: "0"
h: "0"
c: C
+ code: |
+ rrc_hl_ptr(ctx);
- id: RRC A
hex: 0x0F
cat: "8-bit rotations/shifts"
@@ -4377,6 +4379,8 @@ ops:
n: "0"
h: "0"
c: C
+ code: |
+ rl_hl_ptr(ctx);
- id: RL A
hex: 0x17
cat: "8-bit rotations/shifts"
@@ -4495,6 +4499,8 @@ ops:
n: "0"
h: "0"
c: C
+ code: |
+ rr_hl_ptr(ctx);
- id: RR A
hex: 0x1F
cat: "8-bit rotations/shifts"
@@ -4613,6 +4619,8 @@ ops:
n: "0"
h: "0"
c: C
+ code: |
+ sla_hl_ptr(ctx);
- id: SLA A
hex: 0x27
cat: "8-bit rotations/shifts"
@@ -4731,6 +4739,8 @@ ops:
n: "0"
h: "0"
c: "0"
+ code: |
+ sra_hl_ptr(ctx);
- id: SRA A
hex: 0x2F
cat: "8-bit rotations/shifts"
@@ -4849,6 +4859,8 @@ ops:
n: "0"
h: "0"
c: "0"
+ code: |
+ swap_hl_ptr(ctx);
- id: SWAP A
hex: 0x37
cat: "8-bit rotations/shifts"
@@ -4967,6 +4979,8 @@ ops:
n: "0"
h: "0"
c: C
+ code: |
+ srl_hl_ptr(ctx);
- id: SRL A
hex: 0x3F
cat: "8-bit rotations/shifts"
@@ -9831,6 +9845,26 @@ templates:
}
static void
+ rrc_hl_ptr(
+ gb_t * const ctx
+ ) {
+ // get old value, carry bit, and new value
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ c = (o & 0x01) ? 1 : 0,
+ n = (o >> 1) | (c ? 0x80 : 0);
+ // set value
+ mmu_wb(ctx, addr, n);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (n ? 0 : F_Z) |
+ (c ? F_C : 0)
+ ));
+ }
+
+
+ static void
rl_rb(
gb_t * const ctx,
const rb_t reg
@@ -9849,6 +9883,24 @@ templates:
}
static void
+ rl_hl_ptr(
+ gb_t * const ctx
+ ) {
+ // get old value and new value
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ n = (o << 1) + (FLAG(ctx, C) ? 1 : 0);
+ // set value
+ mmu_wb(ctx, addr, n);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (n ? 0 : F_Z) |
+ ((o & 0x80) ? F_C : 0)
+ ));
+ }
+
+ static void
rr_rb(
gb_t * const ctx,
const rb_t reg
@@ -9867,6 +9919,24 @@ templates:
}
static void
+ rr_hl_ptr(
+ gb_t * const ctx
+ ) {
+ // get old value and new value
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ n = (FLAG(ctx, C) ? 0x80 : 0) | (o >> 1);
+ // set value
+ mmu_wb(ctx, addr, n);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (n ? 0 : F_Z) |
+ ((o & 0x01) ? F_C : 0)
+ ));
+ }
+
+ static void
sla_rb(
gb_t * const ctx,
const rb_t reg
@@ -9885,6 +9955,24 @@ templates:
}
static void
+ sla_hl_ptr(
+ gb_t * const ctx
+ ) {
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ v = o << 1;
+
+ // set value
+ mmu_wb(ctx, addr, v);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (v ? 0 : F_Z) |
+ ((o & 0x80) ? F_C : 0)
+ ));
+ }
+
+ static void
sra_rb(
gb_t * const ctx,
const rb_t reg
@@ -9903,6 +9991,24 @@ templates:
}
static void
+ sra_hl_ptr(
+ gb_t * const ctx
+ ) {
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ v = ((o & 0x80) ? 0x80 : 0) | (o >> 1);
+
+ // set value
+ mmu_wb(ctx, addr, v);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (v ? 0 : F_Z) |
+ ((o & 0x01) ? F_C : 0)
+ ));
+ }
+
+ static void
srl_rb(
gb_t * const ctx,
const rb_t reg
@@ -9921,6 +10027,24 @@ templates:
}
static void
+ srl_hl_ptr(
+ gb_t * const ctx
+ ) {
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t o = mmu_rb(ctx, addr),
+ v = (o >> 1);
+
+ // set value
+ mmu_wb(ctx, addr, v);
+
+ // set flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (v ? 0 : F_Z) |
+ ((o & 0x01) ? F_C : 0)
+ ));
+ }
+
+ static void
bit_rb(
gb_t * const ctx,
const rb_t reg,
@@ -10003,7 +10127,10 @@ templates:
gb_t * const ctx,
const rb_t reg
) {
+ // get old value
const uint8_t v = cpu_rb(ctx, reg);
+
+ // write value
cpu_wb(ctx, reg, ((v & (0x0F)) << 4) | ((v & 0xF0) >> 4));
// write flags
@@ -10013,6 +10140,22 @@ templates:
}
static void
+ swap_hl_ptr(
+ gb_t * const ctx
+ ) {
+ const uint16_t addr = cpu_rw(ctx, RW_HL);
+ const uint8_t v = mmu_rb(ctx, addr);
+
+ // write value
+ mmu_wb(ctx, addr, ((v & (0x0F)) << 4) | ((v & 0xF0) >> 4));
+
+ // write flags
+ cpu_wf(ctx, F_Z | F_N | F_H | F_C, (
+ (v ? 0 : F_Z)
+ ));
+ }
+
+ static void
jr(
gb_t * const ctx,
const uint16_t ofs_addr