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author | Paul Duncan <pabs@pablotron.org> | 2018-06-20 15:28:43 -0400 |
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committer | Paul Duncan <pabs@pablotron.org> | 2018-06-20 15:28:43 -0400 |
commit | 1aa739d393a4ee39034de7138e201f5cf7c09a06 (patch) | |
tree | 05be8323c7741bcdfe81419106555a785d813dd5 | |
parent | 064ab1a623e444bce788a3edb128443041e765aa (diff) | |
download | gb-c-1aa739d393a4ee39034de7138e201f5cf7c09a06.tar.bz2 gb-c-1aa739d393a4ee39034de7138e201f5cf7c09a06.zip |
add gb_frame(), clean up comments
-rw-r--r-- | ops.yaml | 43 |
1 files changed, 34 insertions, 9 deletions
@@ -7587,6 +7587,7 @@ templates: // FIXME: combine these? uint8_t bios[0x100]; // bios (256 bytes) uint8_t ram[0x2000]; // working ram (8k) + uint8_t eram[65536]; // external ram (banked, up to 64k) uint8_t vram[0x2000]; // vram (8k) uint8_t oam[0xA0]; // oam (160 bytes) uint8_t zram[0x7F]; // zram (128 bytes) @@ -7597,33 +7598,42 @@ templates: union { struct { - // mbc1 registers + // current rom bank (5 bits); see note about + // rom_ram_mode below uint8_t rom_bank; + + // is external ram enabled? bool ram_enable; + + // ram bank + // rom_ram_mode == 0: high two bits of rom bank + // rom_ram_mode == 1: ram bank uint8_t ram_bank; + + // set interpretation of ram_bank bool rom_ram_mode; } mbc1; struct { + // current rom bank (4 bits) uint8_t rom_bank; + + // is eram enabled? bool ram_enable; } mbc2; }; - // enable interrupt flags (addr: 0xFFFF) - uint8_t ie; - - // interrupts (addr: 0xFF0F) + // interrupts + // ie: interrupt enable (addr: 0xFFFF) + // iv: interrupt vector (addr: 0xFF0F) // (gb-manual, p26) + uint8_t ie; uint8_t iv; // buttons (addr: 0xFF00) // gb-manual, p23 uint8_t p1_mode; uint8_t btns; - - // external ram (optional, up to 64k) - uint8_t eram[65536]; } mmu; struct { @@ -7640,7 +7650,8 @@ templates: obp1, line, lyc; - uint8_t frame[3 * 160 * 144]; + uint8_t rgb[3 * 160 * 144]; + uint32_t frame_num; } gpu; struct { @@ -9520,6 +9531,9 @@ templates: // set mode gpu_set_mode(ctx, GPU_MODE_OAM); } else { + // increment frame number + ctx->gpu.frame++; + // set mode gpu_set_mode(ctx, GPU_MODE_VBLANK); } @@ -9718,3 +9732,14 @@ templates: // advance gpu gpu_step(ctx, clock); } + + void + gb_frame( + gb_t * const ctx + ) { + const uint32_t frame = ctx->gpu.frame; + + while (ctx->gpu.frame == frame) { + gb_step(ctx); + } + } |