diff options
author | Paul Duncan <pabs@pablotron.org> | 2018-06-21 23:17:31 -0400 |
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committer | Paul Duncan <pabs@pablotron.org> | 2018-06-21 23:17:31 -0400 |
commit | a0b061cb35905c1f09fb07e9ef851280b1663a5b (patch) | |
tree | c2580d2a35fe69dadff8ffe37bc38ef56f712bd7 | |
parent | 1d5dce07c97ad0b8c7c63239e7ddc6d4cdff2d93 (diff) | |
download | gb-c-a0b061cb35905c1f09fb07e9ef851280b1663a5b.tar.bz2 gb-c-a0b061cb35905c1f09fb07e9ef851280b1663a5b.zip |
more op fixes
-rw-r--r-- | ops.yaml | 20 | ||||
-rw-r--r-- | test.c | 14 |
2 files changed, 21 insertions, 13 deletions
@@ -36,7 +36,7 @@ ops: h: c: code: | - cpu_rw(ctx, mmu_rw(ctx, old_pc + 1)); + cpu_ww(ctx, RW_BC, mmu_rw(ctx, old_pc + 1)); - id: LD (BC), A hex: 0x02 cat: "8-bit load/store/move" @@ -9061,6 +9061,7 @@ templates: case RB_A: return cpu_rw(ctx, RW_AF) >> 8; case RB_F: + // FIXME: should be 0xF0 to mask flags return cpu_rw(ctx, RW_AF) & 0xFF; case RB_B: return cpu_rw(ctx, RW_BC) >> 8; @@ -9087,28 +9088,29 @@ templates: ) { switch (reg) { case RB_A: - ctx->cpu.rs[RW_AF] = (((uint16_t) val) << 8) + (ctx->cpu.rs[RW_AF] & 0xFF); + // FIXME: second mask should be 0xF0 to mask flags + ctx->cpu.rs[RW_AF] = (((uint16_t) val) << 8) | (ctx->cpu.rs[RW_AF] & 0xFF); break; case RB_F: - ctx->cpu.rs[RW_AF] = (ctx->cpu.rs[RW_AF] & 0xFF00) + val; + ctx->cpu.rs[RW_AF] = (ctx->cpu.rs[RW_AF] & 0xFF00) | val; break; case RB_B: - ctx->cpu.rs[RW_BC] = (((uint16_t) val) << 8) + (ctx->cpu.rs[RW_BC] & 0xFF); + ctx->cpu.rs[RW_BC] = (((uint16_t) val) << 8) | (ctx->cpu.rs[RW_BC] & 0xFF); break; case RB_C: - ctx->cpu.rs[RW_BC] = (ctx->cpu.rs[RW_BC] & 0xFF00) + val; + ctx->cpu.rs[RW_BC] = (ctx->cpu.rs[RW_BC] & 0xFF00) | val; break; case RB_D: - ctx->cpu.rs[RW_DE] = (((uint16_t) val) << 8) + (ctx->cpu.rs[RW_DE] & 0xFF); + ctx->cpu.rs[RW_DE] = (((uint16_t) val) << 8) | (ctx->cpu.rs[RW_DE] & 0xFF); break; case RB_E: - ctx->cpu.rs[RW_DE] = (ctx->cpu.rs[RW_DE] & 0xFF00) + val; + ctx->cpu.rs[RW_DE] = (ctx->cpu.rs[RW_DE] & 0xFF00) | val; break; case RB_H: - ctx->cpu.rs[RW_HL] = (((uint16_t) val) << 8) + (ctx->cpu.rs[RW_HL] & 0xFF); + ctx->cpu.rs[RW_HL] = (((uint16_t) val) << 8) | (ctx->cpu.rs[RW_HL] & 0xFF); break; case RB_L: - ctx->cpu.rs[RW_HL] = (ctx->cpu.rs[RW_HL] & 0xFF00) + val; + ctx->cpu.rs[RW_HL] = (ctx->cpu.rs[RW_HL] & 0xFF00) | val; break; default: // FIXME: do what now? @@ -10,7 +10,8 @@ #include "gb.h" #define NUM_FRAMES 600 -#define NUM_STEPS 20000 +#define SKIP_STEPS 83000000 +#define NUM_STEPS 200000 static uint32_t file_size( @@ -130,12 +131,17 @@ test_execute_steps( gb_init(&ctx, rom_data, rom_size); fprintf(stderr, "gb context initialized\n"); - // render frames - for (size_t j = 0; j < NUM_STEPS; j++) { + for (size_t i = 0; i < SKIP_STEPS; i++) { + // step cpu + gb_step(&ctx); + } + + // run cpu + for (size_t i = 0; i < NUM_STEPS; i++) { // print context gb_dump_context(&ctx); - // render frame + // step cpu gb_step(&ctx); } |