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author | Paul Duncan <pabs@pablotron.org> | 2018-06-27 23:06:48 -0400 |
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committer | Paul Duncan <pabs@pablotron.org> | 2018-06-27 23:06:48 -0400 |
commit | fa0db0d91035b8ff66bd40608ecf8c835b74799b (patch) | |
tree | 6063fd5790efaef7b5db67f53f4b0e350793723d | |
parent | 9b1ece39d6dac829fe9014b5de776b2d68fec0c3 (diff) | |
download | gb-c-fa0db0d91035b8ff66bd40608ecf8c835b74799b.tar.bz2 gb-c-fa0db0d91035b8ff66bd40608ecf8c835b74799b.zip |
remove gpu mode checks in {vram,oam}_{rb,wb}()
-rw-r--r-- | ops.yaml | 55 |
1 files changed, 50 insertions, 5 deletions
@@ -8828,8 +8828,9 @@ templates: } } + #if 0 static uint8_t - vram_rb( + old_vram_rb( const gb_t * const ctx, const uint16_t addr ) { @@ -8843,7 +8844,7 @@ templates: } static uint8_t - oam_rb( + old_oam_rb( const gb_t * const ctx, const uint16_t addr ) { @@ -8857,6 +8858,25 @@ templates: return 0; } } + #endif /* 0 */ + + static uint8_t + vram_rb( + const gb_t * const ctx, + const uint16_t addr + ) { + // return vram (8k) + return ctx->mmu.vram[addr & 0x1FFF]; + } + + static uint8_t + oam_rb( + const gb_t * const ctx, + const uint16_t addr + ) { + // oam memory (160 bytes): + return ctx->mmu.oam[addr - 0xFE00]; + } static uint8_t ram_rb( @@ -8962,13 +8982,14 @@ templates: } } + #if 0 static void - vram_wb( + old_vram_wb( gb_t * const ctx, const uint16_t addr, const uint8_t val ) { - // NOTE: gpu_get_mode() returns VBLANK if lcd is inactive + // // NOTE: gpu_get_mode() returns VBLANK if lcd is inactive switch (gpu_get_mode(ctx)) { case GPU_MODE_VRAM: // do nothing @@ -8981,7 +9002,7 @@ templates: } static void - oam_wb( + old_oam_wb( gb_t * const ctx, const uint16_t addr, const uint8_t val @@ -9002,6 +9023,30 @@ templates: break; } } + #endif /* 0 */ + + static void + vram_wb( + gb_t * const ctx, + const uint16_t addr, + const uint8_t val + ) { + // write to vram (8k) + ctx->mmu.vram[addr & 0x1FFF] = val; + } + + static void + oam_wb( + gb_t * const ctx, + const uint16_t addr, + const uint8_t val + ) { + // oam memory (160 bytes): + ctx->mmu.oam[addr - 0xFE00] = val; + + // invalidate oam cache + ctx->gpu.oam_dirty = true; + } static void ram_wb( |