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author | Paul Duncan <pabs@pablotron.org> | 2022-06-10 22:41:28 -0400 |
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committer | Paul Duncan <pabs@pablotron.org> | 2022-06-10 22:41:28 -0400 |
commit | 954260b517b771234b8544347a53f76e5b638f98 (patch) | |
tree | 8101895234c4307d3778d3db4f6af404dff35c98 /content/posts | |
parent | 6a08bb4c6d4dcc4da5f9a2ca7a5a35d84d218734 (diff) | |
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add content/posts/2022-06-10-hash-speeds.md and assets
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diff --git a/content/posts/2022-06-10-hash-speeds.md b/content/posts/2022-06-10-hash-speeds.md new file mode 100644 index 0000000..d86084d --- /dev/null +++ b/content/posts/2022-06-10-hash-speeds.md @@ -0,0 +1,89 @@ +--- +slug: hash-speeds +title: "OpenSSL Hash Benchmarks" +date: "2022-06-10T20:13:36-04:00" +draft: true +--- + +I compiled [OpenSSL][] 3.0.3 and then benchmarked the following +cryptographic hash functions: + +* [MD5 (broken, don't use!)][md5] +* [SHA-1 (broken, don't use!)][sha1] +* [SHA-256][sha2] +* [SHA-512][sha2] +* [BLAKE2s][blake2] +* [BLAKE2b][blake2] +* [SHA3-256][sha3] +* [SHA3-512][sha3] + +**Note:** [MD5][md5] and [SHA-1][sha1] are included for reference, but +both are broken and should not be used. + +Test systems: + +* [Lenovo Thinkpad X1 Carbon (9th Gen)][laptop]: [i7-1185G7][] CPU + with [accelerated SHA-1 and SHA-256 instructions][intel-sha]. +* [Raspberry Pi 4B][rpi]: [Cortex-A72][] CPU, which does *not* support + the [ARMv8 crypto extensions][arm-crypto]. + +Detailed results, build scripts, and documentation are available in the +[companion GitHub repository][repo]. + +## Thinkpad X1 Carbon Results + +{{< figure + src="/files/posts/hash-speeds/flex-0.svg" + class=image + caption="Lenovo Thinkpad X1 Carbon (9th Gen) results." +>}} + +Notes: + +* The [accelerated SHA-1 and SHA-256 instructions][intel-sha] are + clearly visible in the results. +* [BLAKE2b][blake2] does quite well, considering. + +## Raspberry Pi 4B Results + +{{< figure + src="/files/posts/hash-speeds/cherry-0.svg" + class=image + caption="Raspberry Pi 4B results." +>}} + +Notes: + +* [BLAKE2b][blake2] is clearly the fastest on the [Cortex-A72][]. +* [BLAKE2b][blake2] is faster than [BLAKE2s][blake2] because the former + is optimized for 32-bit CPUs, and the latter is optimized for 64-bit + CPUs. +* [SHA512][sha2] is faster than [SHA256][sha2] because it has a + slight edge on 64-bit systems. + +[repo]: https://github.com/pablotron/hash-speeds + "GitHub repository." +[openssl]: https://www.openssl.org/ + "Cryptography and TLS toolkit." +[md5]: https://en.wikipedia.org/wiki/MD5 + "MD5 cryptographic hash function (broken, don't use)." +[sha1]: https://en.wikipedia.org/wiki/SHA-1 + "SHA-1 cryptographic hash function (broken, don't use)." +[sha2]: https://en.wikipedia.org/wiki/SHA-2 + "SHA-2 cryptographic hash function family." +[blake2]: https://en.wikipedia.org/wiki/BLAKE_(hash_function)#BLAKE2 + "BLAKE2 cryptographic hash function family." +[sha3]: https://en.wikipedia.org/wiki/SHA-3 + "SHA-3 cryptographic hash function family." +[laptop]: https://en.wikipedia.org/wiki/ThinkPad_X1_series#X1_Carbon_(9th_Gen) + "Lenovo Thinkpad X1 Carbon (9th Gen)" +[rpi]: https://en.wikipedia.org/wiki/Raspberry_Pi + "Raspberry Pi 4B" +[intel-sha]: https://en.wikipedia.org/wiki/Intel_SHA_extensions + "Intel SHA extensions" +[i7-1185G7]: https://ark.intel.com/content/www/us/en/ark/products/208664/intel-core-i71185g7-processor-12m-cache-up-to-4-80-ghz-with-ipu.html + "Intel i7-1185G7" +[cortex-a72]: https://en.wikipedia.org/wiki/ARM_Cortex-A72 + "ARM Cortex-A72" +[arm-crypto]: https://en.wikichip.org/wiki/arm/armv8#Crypto_Extension + "ARMv8 crypto extensions" |